The present invention relates to semiconductor devices such as semiconductor rectifying devices for electric power use.
Semiconductor rectifying devices such as diodes are used in various semiconductor apparatuses, such as inverters. The semiconductor rectifying devices are used widely from small- or medium-capacity semiconductor apparatuses, which have a breakdown voltage of about 600 V or less, to high-capacity semiconductor apparatuses, which have a breakdown voltage of about 2.5 kV or more. Recently, switching devices, represented by IGBT""s (insulated gate bipolar transistors), that work at high frequencies with low switching losses have been developed and are used in the high-breakdown-voltage and high-capacity field. Especially in the field of high-capacity use, GTO""s (gate turnoff thyristors) have been replaced by IGBT""s. In association with this replacement, it has been required for the diodes to exhibit high-speed recovery characteristics. In addition, it has also been required for the diodes to operate at high frequencies with low switching loss and to exhibit soft recovery characteristics for reducing EMI noises caused by the diodes operating in power electronics instruments.
A p-i-n diode, that is, a representative semiconductor rectifying device used widely in these days, typically includes an n-type drift layer (i-layer) for securing a high breakdown voltage between a p+-type anode layer contacting an anode electrode and an n+-type cathode layer contacting a cathode electrode. The specific resistance of the nxe2x88x92-type drift layer is higher than the specific resistance of the anode layer and the specific resistance of the cathode layer.
FIG. 4 is a cross-sectional view of a conventional p-i-n diode. Referring to FIG. 4, the conventional p-i-n diode includes an nxe2x88x92-type drift layer 2 with high specific resistance, an n+-type cathode layer 3 contacting a cathode electrode 5 on a major surface of nxe2x88x92-type drift layer 2 and a p+-type anode layer 1 contacting an anode electrode 4 on another major surface of nxe2x88x92-type drift layer 2.
While the diode is switching from the ON-state to the OFF-state (during the reverse recovery process), a high transient current (hereinafter referred to as a xe2x80x9creverse recovery currentxe2x80x9d) flows in the opposite direction through the diode. When a reverse recovery current flows, an electric loss (hereinafter referred to as a xe2x80x9creverse recovery lossxe2x80x9d) larger than the electric loss caused in the steady state is caused in the diode. There is a great need for a diode capable of reducing the reverse recovery loss. The reverse recovery process causes an electrical burden heavier than that in the steady state. As the steady state current or the reverse blocking voltage is increased, the electrical burden increases, which tends to cause a breakdown of the diode. To provide a highly reliable diode for electric power use, it would be highly advantageous to increase capability of a diode to withstand reverse recovery such that it is higher than its capability to withstand the rated current.
The minority carrier lifetime is controlled, in these days, by using heavy metal diffusion or electron beam irradiation to improve the reverse recovery characteristics and the reverse recovery withstanding capability of a diode. Since the total carrier concentration in the steady state is reduced by shortening the carrier lifetime, the carrier concentration swept out during the reverse recovery process by the expansion of the space charge region, the reverse recovery period, the peak reverse recovery current and the reverse recovery electric charges are reduced. Since the high electric field caused by the holes flowing through the space charge region is relaxed by reducing the hole concentration, the electrical burden is reduced and the reverse recovery withstanding capability is thereby improved. A merged p-i-n/Schottky diode (hereinafter referred to as an xe2x80x9cMPSxe2x80x9d), which reduces the injection efficiency of the minority carriers for improving the reverse recovery characteristics, has been developed (cf. U.S. Pat. No. 4,641,174 issued Feb. 3, 1987).
FIG. 5 is a cross-sectional view of a conventional MPS diode. Referring to FIG. 5, the conventional MPS diode includes an nxe2x88x92-type drift layer 2 with high specific resistance, an n+-type cathode layer 3 contacting a cathode electrode 5 on a major surface of nxe2x88x92-type drift layer 2, a p+-type anode layer 1 contacting an anode electrode 4 in a portion of another major surface of nxe2x88x92-type drift layer 2, and a Schottky junction 7 formed between nxe2x88x92-type drift layer 2 and anode electrode 4 in parallel to p+-type anode layer 1.
Japanese Unexamined Laid Open Patent Application H05-218389 discloses a parallel arrangement of a Schottky junction and a p-i-n structure that facilitates reducing the carrier concentration without controlling the carrier lifetime, thus reducing the peak reverse recovery current, reducing the reverse recovery electric charges, and improving the reverse recovery withstanding capability.
One important parameter involved in addition to the reverse recovery characteristics is the temperature coefficient of the forward voltage in the ON-state of the diode. The temperature coefficient of the forward voltage indicates whether the forward voltage at a high temperature is higher or lower, around the rated current, than the forward voltage at the room temperature. The temperature coefficient is positive when the forward voltage at a high temperature is higher than the forward voltage at room temperature, and is negative when the forward voltage at a high temperature is lower than the forward voltage at room temperature. Preferably, the temperature coefficient of the forward voltage is positive.
The current balance in the diode chip, between the diode chips and the diode modules, explains why the positive temperature coefficient of the forward voltage is preferable. When a current localizes in a specific region of a diode chip, the temperature of the specific region rises locally. When the temperature coefficient of the forward voltage is positive, the resistance of the specific portion rises with increasing temperature, relaxing the current localization. When the temperature coefficient of the forward voltage is negative, the resistance of the specific region lowers with increasing temperature, causing further current localization. An imbalance is thus caused in the current flowing through a diode chip, between the currents flowing through diode chips or between the currents flowing through diode modules. At present, multiple diode chips or multiple diode modules are operated, in many cases, in unison for high breakdown voltage use or for high capacity use. Therefore, the temperature coefficient of the forward voltage is preferably positive to achieve well-balanced operations of the diode chip, the diode chips and the diode modules.
The reverse recovery characteristics and the capability of the p-i-n diode to withstand reverse recovery is improved by reducing the impurity concentration in the anode layer. Reducing the concentration of impurities in the anode layer is effective to suppress the peak reverse recovery current. However, the integral impurity concentration in the p+-type anode layer should be maintained at a level of 3xc3x971012 cmxe2x88x922 or more to obtain a certain breakdown voltage. Therefore, the integral impurity concentration in the p+-type anode layer should not be reduced below 3xc3x971012 cmxe2x88x922. Moreover, reducing the integral impurity concentration in the anode layer has the disadvantage of increasing the forward voltage when a high current (about 500 A cmxe2x88x922 or higher) flows during the application of forward bias voltage. This problem is caused by the reduced impurity concentration, since the minority carriers injected are thus reduced. Although it is necessary to control the minority carrier lifetime to increase reverse recovery speed, the temperature coefficient of the forward voltage tends to be negative when the minority carrier lifetime is shortened by intensified electron beam irradiation. The negative temperature coefficient of the forward voltage is caused at high temperature (usually about 125xc2x0 C.) by the carriers exiting from the traps at a rate higher by the Boltzmann factor exe2x88x92xcex94E/KT than those at room temperature and by the narrowed capture cross-section of the carriers at high temperature. Therefore, it is difficult at present for the p-i-n diode including an anode layer, in which the impurity concentration is reduced, to improve the reverse recovery characteristics and to achieve a positive temperature coefficient in the forward voltage.
A means for reducing the hole injection efficiency, such as the MPS described above and a static shielding diode (hereinafter referred to as an xe2x80x9cSSDxe2x80x9d), is capable of improving the reverse recovery characteristics and achieving a positive temperature dependence on forward voltage. Since the MPS and the SSD suppress the hole injection in the ON-state thereof, the carrier concentration therein can be reduced. As a result, the peak reverse recovery current or the reverse recovery electric charges are reduced, and carrier lifetime control may be moderated or eliminated. However, since the MPS includes a Schottky junction in the chip thereof, in addition to the p-i-n structure, the leakage current from the Schottky junction increases in the OFF-state of the diode (when a reverse bias voltage is applied), especially at a high temperature. The leakage current increase is caused by the lowering of barrier height across the Schottky junction. The leakage current increase also occurs in a soft and fast recovery diode (hereinafter referred to as an xe2x80x9cSFDxe2x80x9d), since the SFD also includes a Schottky junction. The leakage current is small in the SSD, since the SSD includes not a Schottky junction but a thin pxe2x88x92-type layer. However, the SSD does not improve the reverse recovery characteristics as compared with the MPS, since holes are injected from the thin pxe2x88x92-type layer when a forward bias voltage is applied.
Japanese Unexamined Laid Open Patent Application H09-136253 discloses a diode structure, including a patterned silicon oxide film and an insulation film on the anode surface, which improves the ability to withstand forward surge current and reverse recovery characteristics. However, it is difficult for the structure disclosed in this patent application to improve the reverse recovery characteristics significantly more than the p-i-n diode, since the disclosed structure forces the side of the anode to accumulate carriers to improve the forward surge current withstanding capability. Since the oxide insulation film blocks the accumulation of carriers in its vicinity, the accumulated carriers increase the peak reverse recovery current Jpr during reverse recovery.
Japanese Unexamined Laid Open Patent Application H07-147418 discloses a diode structure that includes a patterned p+-type anode layer and an oxide film between the anode electrode and the n-type drift layer to improve the reverse recovery characteristics and to reduce the reverse leakage current. FIG. 6 is a cross-sectional view of the diode (hereinafter referred to as the xe2x80x9cSDxe2x80x9d) disclosed in the above identified Patent Application H07-147418. Referring to FIG. 6, the SD includes an n+-type cathode layer 3, a highly resistive nxe2x88x92-type drift layer 2 on n+-type cathode layer 3, a p+-type anode layer 1 in a part of the surface portion of n-type drift layer 2, an anode electrode 4 in contact with p+-type anode layer 1, and an insulation film 6 between nxe2x88x92-type drift layer 2 and anode electrode 4 and in parallel to p+-type anode layer 1.
The SD, which eliminates the Schottky junction from the conventional MPS by completely covering the nxe2x88x92-type drift layer-Schottky junction region with an oxide film, facilitates a greater reduction in the leakage current caused during the reverse recovery than the MPS does. However, carriers are accumulated in the surface portion of nxe2x88x92-type layer below the oxide film in the SD due to the same reason described in connection with the diode structure disclosed in the foregoing Japanese Unexamined Laid Open Patent Application H09-136253. Therefore, it is difficult for the SD to improve the reverse recovery characteristics in the same way as the MPS does.
In view of the foregoing, it is an object of the invention to provide a semiconductor device that obviates the problems described above. It is another object of the invention to provide a semiconductor device that improves reverse recovery characteristics and greatly reduces the leakage current caused during the application of a reverse bias voltage.
According to one aspect of the invention, there is provided a semiconductor device including: a semiconductor chip having a first major surface, a second major surface facing opposite to the first major surface; an anode electrode on the first major surface; and a cathode electrode on the second major surface. The semiconductor chip of the invention includes a first laminate structure, a second laminate structure and a third laminate structure arranged in parallel to each other, the second laminate structure being interposed between the first laminate structure and the third laminate structure; the first laminate structure, the second laminate structure and the third laminate structure commonly possessing a cathode layer of a first conductivity type contacting with the cathode electrode and a drift layer of the first conductivity type on the cathode layer, the drift layer being doped more lightly than the cathode layer. The first laminate structure further includes an anode layer of a second conductivity type on the drift layer, the anode layer being doped more heavily than the drift layer and contacting the anode electrode. The second laminate structure further includes a Schottky junction between the drift layer and the anode electrode, and the third laminate structure further including an insulation film between the drift layer and the anode electrode.
When a forward bias voltage is applied to the anode electrode, electrons flow from the cathode layer of the first conductivity type (n+-type cathode layer) to the Schottky junction in the second laminate structure, and the built-in potential thereof is the lowest. As the forward bias voltage exceeds the built-in potential of the Schottky junction, holes are injected from the anode layer of the second conductivity type (p+-type anode layer). As the current flowing through the semiconductor device (diode) increases, the hole current component of the total current increases. Since the holes as the minority carriers are not injected basically from the Schottky junction when the rated current is flowing, the carrier concentration in the vicinity of the Schottky junction in the second laminate structure is much smaller than the carrier concentration in the same depth of the first laminate structure. Therefore, the efficiency of hole injection from the anode electrode is reduced. Since the second laminate structure (the Schottky junction region) is interposed between the first laminate structure and the third laminate structure, the holes injected from the anode layer of the second conductivity type (pxe2x88x92-type anode layer) hardly reach the third laminate structure. As a result, the carrier concentration in the vicinity of the oxide film in third laminate structure is extremely small, although the oxide film is in third laminate structure. When the width of the second laminate structure is significantly less than the carrier diffusion length, holes reach the third laminate structure, even though the Schottky junction is in second laminate structure. In this case, the hole injection efficiency and, therefore, the carrier concentration are not reduced.
When a reverse bias voltage is applied to the diode, depletion layers expand from the pn-junction and the Schottky junction. The leakage current from the Schottky junction is determined mainly by the current value based on the theory of thermionic emission and the increment of the current caused by the barrier height lowering, which depends on the electric field strength in the vicinity of the junction plane. By covering a part of the Schottky junction, especially the region wherein a strong electric field is caused, with an oxide film according to the invention, the reverse leakage current therefrom is reduced, and the efficiency of hole injection from the anode electrode is suppressed at a low level.
Since the efficiency of hole injection from the anode electrode is suppressed as low as that of the MPS, the concentration of the holes flows through the space charge region formed in the first laminate structure (pn-junction region), especially when the current changes its direction during reverse recovery and, therefore, the peak reverse recovery current is reduced. Since the total carrier concentration is reduced more greatly than in the p-i-n diode, the reverse recovery charges are reduced. As a result, the peak reverse recovery current Jpr is reduced, resulting in a soft recovery.
Advantageously, the third laminate structure further includes a float layer of the second conductivity type between the drift layer and the insulation film, the float layer being doped more heavily than the drift layer. The float layer is not in contact with the anode electrode, but floats electrically from the anode electrode. Also advantageously, the third laminate structure further includes a float layer of the second conductivity type between the drift layer and the insulation film, the float layer being doped more heavily than the drift layer, a part of the float layer being in contact with the anode electrode. Since a depletion layer expands also from the float layer of the second conductivity type (p+-type float layer) beneath the insulation film (oxide film) when a reverse bias voltage is applied, a stronger pinching-off effect is caused and the electric field around the Schottky junction is further relaxed.
Advantageously, the first laminate structure and the second laminate structure distribute in a stripe pattern. Further, the second laminate structure and the third laminate structure also advantageously distribute in a stripe pattern. In another preferred embodiment, the first laminate structure and the second laminate structure are distributed in a dot cell pattern. Also, preferably, the second laminate structure and the third laminate structure are distributed in a dot cell pattern.
Advantageously, the area WS of the second laminate structure in the first major surface and the area WOX of the third laminate structure in the first major surface are related with each other by the following relational expression (1):
0.2 less than WS/(WS+WOX)xe2x80x83xe2x80x83(1)
Since the peak reverse recovery current Jpr is reduced and almost independent of the area ratio WS/(WS+WOX) when the area ratio WS/(WS+WOX) is 20% or more, excellent reverse recovery characteristics are obtained. When the area ratio WS/(WS+WOX) is less than 20%, the peak reverse recovery current Jpr increases, since the effect of the Schottky junction is reduced and the efficiency of hole injection from the anode is increased. The reason for this is that the width of the second laminate structure is significantly less than the carrier diffusion length Lp or Ln.
Advantageously, the area WP of the first laminate structure in the first major surface, the area WS of the second laminate structure in the first major surface and the area WOX of the third laminate structure in the first major surface, are related to each other by the following relational expression:
WP/(WP+WS+WOX)xe2x89xa60.75xe2x80x83xe2x80x83(2)
Since the peak reverse recovery current Jpr is sufficiently small when the area ratio WP/(WP+WS+WOX) is 75% or less, excellent reverse recovery characteristics are obtained.
Advantageously, the insulation film is a silicon oxide film. Preferably, the silicon oxide film is from about 0.01 to 1.0 micrometers in thickness.
Advantageously, the insulation film is a polyimide film. Preferably, the polyimide film is from 0.01 to 1.0 micrometers in thickness.